1. Technical Field
The present invention relates generally to testing of software, and more specifically relates to a system and method for testing pattern sensitive algorithms used in semiconductor design and manufacture.
2. Related Art
To compensate for optical and other process distortions in semiconductor processing, optical proximity correction (OPC) is applied to design shapes. Certain configurations of shapes may be design rule compliant, yet result in systematic defects (e.g., opens, shorts, thinning, or failure of contacts or gates to overlap) when processed by such correction algorithms. In order to develop robust correction algorithms or to screen designs for such problematic shape configurations, it is desirable to identify such problematic configurations in advance of any manufacturing by testing the correction algorithms.
To perform such testing, a set of layout test cases may be collected, or artificial test cases may be synthesized through pseudo-random processes. It is desirable that such test cases are chosen to maximize the coverage of possible shape interactions, subject to the constraints given by process design rules. For low dimensions, one could in theory directly measure the coverage of a design or set of designs by direct counting. For high dimensions, a direct assessment of coverage by generating histograms of the space is impractical, as the required number of table entries is kd where k is the number of bins and d the number of feature dimensions.
Accordingly, a need exists for a system and method that can generate test cases for pattern sensitive algorithms, such as OPC algorithms.